VLSI SoC 2020 Program
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Access to the Zoom link to each session is only available to speakers and registered attendees.
All the events will be held on Mountain Standard Time
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| 5th October 2020 | 6th October 2020 | 7th October 2020 | 8th October 2020 | 9th October 2020 | |
| Mountain Time Zone ( GMT -06:00 ) |
Monday | Tuesday | Wednesday | Thursday | Friday |
| 8:50 AM | Opening Session | ||||
| 9:00 AM - 10:00 AM | Keynote 1 Uri Weiser |
Keynote 2 Andrew B. Kahng |
Keynote 3 Edith Beigne |
Invited Talk Vaughn Betz |
Invited Talk Michael Taylor |
| 10:00 AM - 10:15 AM | Break | ||||
| 10:15 AM - 11:45 AM | Digital -1 | Panel Discussion | Digital -2 | Emerging Technologies | Special Session-2 |
| 11:45AM- 12:00 PM | Break | ||||
| 12:00 PM - 1:00 PM | Analog -1 | Special Session-1 | Invited Talk Luca Carloni |
Ph.D -Forum | Analog -2 |
| 1:00 PM - 2:00 PM | Poster -1 | Security | Poster -2 | Vazgen Sh Melikyan Synopsys University Program Curriculum |
Closing Session |
Click here for Committee Meetings Schedule
- Monday 5 Oct 2020
- Tuesday 6 Oct 2020
- Wednesday 7 Oct 2020
- Thursday 8 Oct 2020
- Friday 9 Oct 2020
Monday 5 Oct 2020
8:30 am - 9:00 am Opening Session
General/Program Chairs: To be decided
9:00 am - 10:00 am Keynote 1: The next step in Computer Architecture - Efficient Machine Learning Architecture
Moderator: -
Speaker: Uri Weiser
Session page: Click here
10:15 am - 11:45 am Digital Design - I
A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance
William Simon
Authors: William Simon, Alexandre Levisse, Marina Zapater and David Atienza
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Cross-Layer Hardware/Software Assessment of the Open-Source NVDLA Configurable Deep Learning Accelerator
Alessandro Veronesi
Authors : Alessandro Veronesi, Milos Krstic and Davide Bertozzi
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SAT-based data-flow mapping onto array processor
Yukio Miyasaka
Authors: Yukio Miyasaka and Masahiro Fujita
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Testing the divergence stack memory in GPGPUs: A modular in-field test strategy
Josie Esteban
Authors: Josie Esteban Rodriguez Condia and Matteo Sonza Reorda
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12:00 pm - 1:00 pm Analog Design - I
A 0.8V 875MS/s 7b low-power SAR ADC for ADC-Based Wireline Receivers in 22nm FDSOI
David Cordova
Authors: David Cordova, Wim Cops, Yann Deval, Francois Rivet, Herve Lapuyade, Nicolas Nodenot and Yohan Piccin
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A Low-Power 10-15 Gb/s Common-Gate CTLE Based on Optimized Active Inductors
Amin Aghighi
Authors: Amin Aghighi, Armin Tajalli and Mohammad Taherzadeh-Sani
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Fast-transient, light-load efficient DC-DC converter using an auxiliary D-LDO
Haochang Zhi
Authors: Haochang Zhi, Yanhan Zeng, Wei Zhou and Hong-zhou Tan
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1:00 pm - 2:30 pm Poster Session 1
An ULP Self-Supplied Brain Interface Circuit
Amin Aghighi
Authors: Amin Aghighi, Massood Tabib-Azar and Armin Tajalli
Breaking ACORN at Bitstream Level
Michail Moraitis
Authors: Michail Moraitis, Elena Dubrova and Kalle Ngo
Mining Hyperproperties from Behavioral Traces
Mayank Rawat
Authors: Mayank Rawat, Sujit Muduli and Pramod Subramanyan
PT controlled buck converter with adaptive PCCM using charge monitoring and NMOS current sensing
Yongnan Chen
Authors: Yongnan Chen, Yanhan Zeng, Junkai Chen and Hong-zhou Tan
RAT: A Lightweight System-level Soft Error Mitigation Technique
Jonas Gava
Authors: Jonas Gava, Ricardo Reis and Luciano Ost
Tuesday 6 Oct 2020
9:00 am - 10:00 am Keynote 2: Open-Source EDA: If We Build It, Who Will Come?
Keynote 3: Andrew Kahng – Professor @ UC San Diego
Chair: -
Session page: Click Here
10:15 am - 11:45 am Panel Discussion
Information not available
12:00 pm - 1:30 pm Special Session I
Information not available
1:00 pm - 2:00 pm Security
A Minimalistic Perspective on Koblitz Curve Scalar Multiplication for FPGA Platforms
Siddhartha Chowdhury
Author: Siddhartha Chowdhury, Debapriya Basu Roy and Debdeep Mukhopadhyay
Early RTL Analysis for SCA Vulnerability in Fuzzy Extractors of Memory-Based PUF Enabled Devices
Xinhui Lai
Authors: Xinhui Lai, Maksim Jenihhin, Georgios Selimis, Sven Goossens, Roel Maes and Kolin Paul
SANSCrypt: A Sporadic-Authentication-Based Sequential Logic Encryption Scheme
Yinghua Hu
Authors: Yinghua Hu, Kaixin Yang, Shahin Nazarian and Pierluigi Nuzzo
Wednesday 7 Oct 2020
9:00 am - 10:00 am Keynote 3: AR/VR applications: Silicon challenges and Research directions
Keynote 3: Edith Beigne – Silicon Research Manager @ Facebook
Chair: -
Session page: Click Here
10:15 am - 11:45 am Digital Design - II
A Model Study of Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication in 2.5D Integration
Rakshith Saligram
Authors: Rakshith Saligram, Ankit Kaul, Muhannad S Bakir and Arijit Raychowdhury
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An Open-source Framework for Autonomous SoC Design with Analog Block Generation
Tutu Ajayi
Author: Tutu Ajayi, Sumanth Kamineni, Yaswanth K Cherivirala, Morteza Fayazi, Kyumin Kwon, Mehdi Saligane, Shourya Gupta, Chien-Hen Chen, Dennis Sylvester, David Blaauw, Ronald Dreslinski Jr, Benton Calhoun, and David Wentzloff
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Automatic Timing Closure for Relative Timed Designs
Tannu Sharma
Authors: Tannu Sharma and Ken Stevens
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MIST: monitor generation from informal specifications for firmware verification
Samuele Germiniani
Author: Samuele Germiniani, Moreno Bragaglio and Graziano Pravadelli
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12:00 pm - 1:00 pm Invited Talk 1 : Luca Carloni – Professor @ Columbia University
Scalable Open-Source System-on-Chip Design
Luca Carloni is Professor of Computer Science at Columbia University in the City
of New York. He holds a Laurea Degree Summa cum Laude in Electronics
Engineering from the University of Bologna, Italy, and the MS and PhD degrees in
Electrical Engineering and Computer Sciences from the University of California,
Berkeley. His research interests include methodologies and tools for multi-core
system-on-chip platforms with emphasis on system-level design and intellectual
property reuse, design and optimization of networks-on-chip, and distributed
embedded systems. He coauthored over one hundred and fifty refereed papers.
Luca received the Faculty Early Career Development (CAREER) Award from the
National Science Foundation in 2006, was selected as an Alfred P. Sloan Research
Fellow in 2008, and received the ONR Young Investigator Award and the IEEE CEDA
Early Career Award in 2010 and 2012, respectively. In 2013, Luca served as
general chair of Embedded Systems Week (ESWeek), the premier event covering all
aspects of embedded systems and software. Luca is an IEEE Fellow.
1:00 pm - 2:00 pm Poster Session II
Basic Block Encoding Based Run-time CFI Check for Embedded Software
Love Sah
Authors: Love Sah, Srivarsha Polnati, Sheikh Ariful Islam and Srinivas Katkoori
Exploring the FPGA Implementations of the LBlock, Piccolo, Twine, and Klein Ciphers
Stelios Moraitis
Authors: Stelios Moraitis, Dimitris Seitanidis, George Theodoridis and Odysseas Koufopavlou
Simultaneous Estimation of Temperature and Voltage from Digital Delay Diversity
Xiaoyu Lian
Authors: Xiaoyu Lian, Sherief Reda and Jacob Rosenstein
Ultra-Compact, Scalable, Energy-Efficient VO2 Insulator-Metal-Transition Oxide Based Spiking Neurons for Liquid State Machines
Samiran Ganguly
Authors: Samiran Ganguly, Nikhil Shukla and Avik Ghosh
Thursday 8 Oct 2020
9:00 am - 10:00 am Invited Talk 2: Vaughn Betz - Professor @ University of Toronto
Invited Talk 2
10:15 am - 11:45 am Emerging Technologies
3D logic cells design and results based on Vertical NWFET technology including tied compact model
Arnaud Poittevin
Authors: Arnaud Poittevin, Chhandak Mukherjee, Ian O'Connor, Cristell Maneux, Guilhem Larrieu, Abhishek Kumar, François Marc, Aurélie Lecestre, Marina Deng and Sébastien Le Beux
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abstractPIM: Bridging the Gap Between PIM Technology and ISA
Adi Eliahu
Authors: Adi Eliahu, Rotem Ben Hur, Ronny Ronen and Shahar Kvatinsky
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Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics
Brian Crafton
Authors: Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung-Kyu Lim and Arijit Raychowdhury
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Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow
Edouard Giacomin
Authors: Edouard Giacomin, Jürgen Bömmels, Julien Ryckaert, Francky Catthoor and Pierre-Emmanuel Gaillardon
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X-MAGIC: Enhancing PIM using Input-Overwriting Capabilities
Natan Peled
Authors: Natan Peled, Rotem Ben-Hur, Ronny Ronen and Shahar Kvatinsky
12:00 pm - 1:00 pm PhD Forum Presentation
Design Automation for Side Channel Resistant Lightweight Cryptography
Rajat Sadhukhan and Debdeep Mukhopadhyay
Design, Implementation and Analysis of Efficient Hardware-based Security Primitives
N. Nalla Anandakumar
Device Modeling and Circuit Design for Scalable Beyond-CMOS Computing
Xuan Hu
Author: Xuan Hu, Naimul Hassan, Wesley H. Brigner, Maverick Chauwin and Joseph S. Friedman
Hardware-friendly method for DNN compression using LFSR-Generated Pseudo-Random Indices
Foroozan Karimzadeh
Authors: Foroozan Karimzadeh and Arijit Raychowdhury
Multiple NoC based Custom Implementation and Traffic Distribution to attain Energy Efficient CMPs
Sonal Yadav
Online Reward-Based Training of Spiking Central Pattern Generator for Hexapod Locomotion
Ashwin Sanjay Lele
Authors: Ashwin Sanjay Lele, Yan Fang, Justin Ting and Arijit Raychowdhury
Optimization Tools for ConvNets on the Edge
Valentino Peluso
Authors: Valentino Peluso, Enrico Macii and Andrea Calimera
Friday 9 Oct 2020
9:00 am - 10:00 am Invited Talk 3: Michael Taylor Associate Professor @ University of Washington
Invited Talk 3
10:15 am - 11:45 am Special Session II
Information not available
12:00 pm - 1:00 pm Analog Session II
Energy and Area Efficient Mixed-Mode MCMC MIMO Detector
Amin Aghighi
Authors: Amin Aghighi, Behrouz Farhand and Armin Tajalli
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Subthreshold-Hybrid Solutions for Thermal Sensor and Reference Circuits in Advanced CMOS
Matthias Eberlein
Authors: Matthias Eberlein and Harald Pretl
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Temperature and Supply Voltage Monitoring with Current-mode Relaxation Oscillators
Shanshan Dai
Authors: Shanshan Dai, Caleb Tulloss, Xiaoyu Lian, Kangping Hu, Sherief Reda and Jacob Rosenstein
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1:00 pm - 1:30 pm Closing Session
Speakers: To be decided